IEEE 1450.6.2-2014
- IEEE Standard for Memory Modeling in Core Test Language
- standard by IEEE, 06/13/2014
- Category: IEEE
$132.00
$66.00
New IEEE Standard - Active.Reuse of test data and test structures developed for individual cores (designs) when integrated into larger integrated circuits is required for system-on-chip (SoC) tests. This standard defines language constructs sufficient to represent the context of a memory core and of the integration of that memory core into an SoC. This facilitates the development and reuse of test and repair mechanisms for memories. This standard also defines constructs that represent the test structures internal to the memory core for reuse in the creation of the tests for the logic outside the memory core. Semantic rules are defined for the language to facilitate interoperability between different entities (the memory core provider, the system integrator, and the automation tool developer) involved in the creation of an SoC. The capabilities are an extension of IEEE Std 1450.6(TM)-2005. As a result of this extension, CTLa??s limitations of handling memories are addressed.
PDF
All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.
Multi-User Access
After purchasing, you have the ability to assign each license to a specific user.
Printable
At any time, you are permitted to make printed copies for your and your members' reference use.
