• JEDEC JEP154

JEDEC JEP154

  • GUIDELINE FOR CHARACTERIZING SOLDER BUMP ELECTROMIGRATION UNDER CONSTANT CURRENT AND TEMPERATURE STRESS
  • standard by JEDEC Solid State Technology Association, 01/01/2008
  • Category: JEDEC

$76.00 $38.00

This document describes a method to test the electromigration (EM) susceptibility of solder bumps, including other types of bumps, such as solder capped copper pillars, used in flip-chip packages. The method is valid for Sn/Pb eutectic, high Pb, and Pb-free solder bumps. The document discusses the advantages and concerns associated with EM testing, as well as options for data analysis.
PDF

All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.

Multi-User Access

After purchasing, you have the ability to assign each license to a specific user.

Printable

At any time, you are permitted to make printed copies for your and your members' reference use.

JEDEC JESD75-1

JEDEC JESD75-1

BALL GRID ARRAY PINOUTS STANDARDIZED FOR 16, 18, AND 20-BIT LOGIC FUNCTIONS USING A 54 BALL PACKAGE..

$24.00 $48.00

JEDEC JESD8-13

JEDEC JESD8-13

SCALABLE LOW-VOLTAGE SIGNALING FOR 400 MV (SLVS-400)..

$27.00 $53.00

JEDEC JESD73-4

JEDEC JESD73-4

STANDARD FOR DESCRIPTION OF 3877 - 2.5 V, DUAL 5-BIT, 2-PORT, DDR FET SWITCH..

$26.00 $51.00

JEDEC JESD73-3

JEDEC JESD73-3

STANDARD FOR DESCRIPTION OF 3867 - 2.5 V, SINGLE 10-BIT, 2-PORT, DDR FET SWITCH..

$26.00 $51.00