JEDEC JESD 82-29A
- DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1
- standard by JEDEC Solid State Technology Association, 12/01/2010
- Category: JEDEC
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