• JEDEC JESD22-A117D

JEDEC JESD22-A117D

  • ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST
  • standard by JEDEC Solid State Technology Association, 08/01/2018
  • Category: JEDEC

$67.00 $34.00

JEDEC JESD22-A117D is intended to determine the ability of an EEPROM integrated circuit or an integrated circuit with an EEPROM module (such as a microprocessor) to sustain repeated data changes without failure (program/erase endurance) and to retain data for the expected life of the EEPROM (data retention). This Standard specifies the procedural requirements for performing valid endurance and retention tests based on a qualification specification. Endurance and retention qualification specifications (for cycle counts, durations, temperatures, and sample sizes) are specified in JESD47 or may be developed using knowledge-based methods as in JESD94.
PDF

All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.

Multi-User Access

After purchasing, you have the ability to assign each license to a specific user.

Printable

At any time, you are permitted to make printed copies for your and your members' reference use.

JEDEC JESD82-1A

JEDEC JESD82-1A

DEFINITION OF CVF857 PLL CLOCK DRIVER FOR REGISTERED PC1600, PC2100, PC2700, AND PC3200 DIMM APPLICA..

$34.00 $67.00

JEDEC JEP137B

JEDEC JEP137B

COMMON FLASH INTERFACE (CFI) IDENTIFICATION CODES..

$27.00 $53.00

JEDEC JESD 22-A111

JEDEC JESD 22-A111

EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMME..

$30.00 $59.00

JEDEC JS 9702

JEDEC JS 9702

IPC/JEDEC-9702: MONOTONIC BEND CHARACTERIZATION OF BOARD-LEVEL INTERCONNECTS (IPC/JEDEC-9702)..

$30.00 $60.00