JEDEC JESD28-A
- A PROCEDURE FOR MEASURING N-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION UNDER DC STRESS
- standard by JEDEC Solid State Technology Association, 12/01/2001
- Category: JEDEC
$59.00
$30.00
This document describes an accelerated test for measuring the hot-carrier-induced degradation of a single n-channel MOSFET using dc bias. The purpose of this document is to specify a minimum set of measurements so that valid comparisons can be made between different technologies, IC processes, and process variations in a simple, consistent and controlled way. The measurements specified should be viewed as a starting point in the characterization and benchmarking of the transistor manufacturing process.
PDF
All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.
Multi-User Access
After purchasing, you have the ability to assign each license to a specific user.
Printable
At any time, you are permitted to make printed copies for your and your members' reference use.