• JEDEC JESD51-4

JEDEC JESD51-4

  • THERMAL TEST CHIP GUIDELINE (WIRE BOND TYPE CHIP)
  • standard by JEDEC Solid State Technology Association, 02/01/1997
  • Category: JEDEC

$56.00 $28.00

This guideline describes design requirements for wire bond type semiconductor chips to be used for thermal resistance listing of IC packages. This document provides specific guidelines for chip design but allows flexibility in the materials and layout requirements.
PDF

All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.

Multi-User Access

After purchasing, you have the ability to assign each license to a specific user.

Printable

At any time, you are permitted to make printed copies for your and your members' reference use.

JEDEC JESD235B

JEDEC JESD235B

HIgh Bandwidth Memory DRAM (HBM1, HBM2)..

$114.00 $228.00

JEDEC JESD250B

JEDEC JESD250B

Graphics Double Data Rate (GDDR6) SGRAM Standard..

$114.00 $228.00

JEDEC JESD22-A117E

JEDEC JESD22-A117E

ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST..

$34.00 $67.00

JEDEC JEP118

JEDEC JEP118

GUIDELINES FOR GaAs MMIC AND FET LIFE TESTING..

$36.00 $72.00