• JEDEC JESD8-6

JEDEC JESD8-6

  • ADDENDUM No. 6 to JESD8 - HIGH SPEED TRANSCEIVER LOGIC (HSTL)- A 1.5 V OUTPUT BUFFER SUPPLY VOLTAGE BASED INTERFACE STANDARD FOR
  • standard by JEDEC Solid State Technology Association, 08/01/1995
  • Category: JEDEC

$60.00 $30.00

This standard is a 1.5 volt high performance CMOS-based interface document suitable for high I/O count CMOS and BiCMOS devices operating at frequencies in excess of 200 Mhz.
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JEDEC JEP170

JEDEC JEP170

Guidelines for Visual Inspection and Control of Flip Chip Type Components (FCxGA)..

$30.00 $59.00

JEDEC JEP162

JEDEC JEP162

System Level ESD: Part II: Implementation of Effective ESD Robust Designs..

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JEDEC JESD79-3-1A

JEDEC JESD79-3-1A

Addendum No. 1 to JESD79-3 - 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, and DDR3L-1600..

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JEDEC JESD226

JEDEC JESD226

RF Biased Life (RFBL) Test Method..

$30.00 $60.00