• JEDEC JESD90

JEDEC JESD90

  • A PROCEDURE FOR MEASURING P-CHANNEL MOSFET NEGATIVE BIAS TEMPERATURE INSTABILITIES
  • standard by JEDEC Solid State Technology Association, 11/01/2004
  • Category: JEDEC

$60.00 $30.00

This document describes an accelerated stress and test methodology for measuring device parameter changes of a single p-channel MOSFET after Negative Bias Temperature Instability (NBTI) stress at dc bias conditions. This document gives a procedure to investigate NBTI stress in a symmetric voltage condition with the channel inverted (VGS < 0) and no channel conduction (VDS = 0).There can be NBTI degradation during channel conduction (VGS < 0, VDS < 0), however, this document does not cover this phenomena.
PDF

All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.

Multi-User Access

After purchasing, you have the ability to assign each license to a specific user.

Printable

At any time, you are permitted to make printed copies for your and your members' reference use.

JEDEC JESD22-A117D

JEDEC JESD22-A117D

ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST..

$34.00 $67.00

JEDEC JESD251

JEDEC JESD251

EXPANDED SERIAL PERIPHERAL INTERFACE (xSPI) FOR NON VOLATILE MEMORY DEVICES, VERSION 1.0..

$58.00 $116.00

JEDEC JEP132A

JEDEC JEP132A

PROCESS CHARACTERIZATION GUIDELINE..

$39.00 $78.00

JEDEC JEP001-2A

JEDEC JEP001-2A

FOUNDRY PROCESS QUALIFICATION GUIDELINES - FRONT END TRANSISTOR LEVEL (Wafer Fabrication Manufacturi..

$39.00 $78.00